NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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during enough time, then the carrier will not be validated and the validation block will turn
off.
If no carrier signal is validated within the on time of the LFR, the state machine returns
to the off state and the alternating cycle of on time and off time continues. Carrier edge
counts start at zero when a new on time begins.
In the data mode (CARMOD = 0), if the required number of carrier edges are detected
before the end of the ON time, the LFR will remain ON to complete the reception of a
message telegram.
In the carrier detect mode (CARMOD = 1) there is no need to enable other LFR circuitry
to evaluate any other message components after the required number of carrier edges
are detected. One or several consecutive carriers can be validated by this process
before the LFCDF flag is set. The LFCC control bits are used to program the number of
consecutive ON times where a complete carrier validation is needed before interrupting
the MCU. In this case, the LFCDF flag is set and, provided the LFCDIE interrupt enable
is also set, an interrupt is issued to wake the MCU. In carrier detect mode, the LFCDIE
control bit should always be set because the intended purpose of the carrier detect mode
is to wake the MCU when a carrier is detected. When LFCDF is set, the LFR waits until it
is cleared before it continues the alternating cycle of on time and off time, starting with an
off time.
In data mode, when a carrier is detected the averaging filter is powered on and the
LFR continues to the next state to look for the rest of a message telegram; and the LFR
module will search for valid SYNC word (with length programmed through the SYNC
bits in the LFCTL3 register depending on preamble type). If the external LF field is not
a TPMS frame, a timeout will turn off the LFR module. This timeout can be program
through TIMOUT bit the LFCTL4 register.