RFL 9780 RFL Electronics Inc.
April 8, 2003 6-19 (973) 334-3100
6.5.1.4 PRE-TRIP TIMER
The pre-trip timer ensures that a valid trip input has been received before a trip output can be generated.
This timer enhances security, since it is unlikely that noise corresponding to a trip signal will persist for
any length of time causing a false trip.
Trip commands from the receiving section appear as a logic-high trip input at edge connector pin C14
(TRIP_INPUT). If INHIBIT, BLOCK, and GUARD_INPUT signals are not active, the pre-trip timer
will begin to count up to the preset time interval. Once the pre-trip timer is satisfied, the output of this
timer, PRE_TRIP, will go high. Once the trip input is no longer present, the pre-trip timer will return to
its original state to wait for the next trip input. This signal is applied to the bipolar timer where it may
be further qualified depending upon the state of the bipolar noise detector.
6.5.1.5 TRIP-HOLD TIMER
The trip-hold timer ensures that the valid trip inputs it receives are sustained long enough to actuate the
circuit breaker on the protected line. It accomplishes this by maintaining the output for an additional
preset time interval when the valid trip is no longer present, or if a noise burst were to block the trip
channel.
When the HAS_TRIPPED signal goes high, the trip signal applied to the trip-hold timer signal will go
high unless a logic-high is applied to the STOP_TRIP input at edge connector pin B25. The output
signal of the trip-hold timer, TRIP_HELD, will be high and remain high for the duration of the preset
time interval of the trip hold timer. Note that the trip-hold timer is not used for all applications, in
which case the TRIP_HELD output signal would be programmed to go low at the same time as the
input goes low. The TRIP_HELD signal triggers the trip output circuit. It is also applied to many of the
other timers and logic circuits. LOW_SIGNAL trip is passed through and is not held for any additional
time. A logic high TRIPPED signal is applied to the GBT/TAG timer when either HAS_TRIPPED or
LOW_SIGNAL_TRIP is active.
6.5.1.6 TRIP OUTPUT CIRCUIT
The trip-hold timer output circuit signal, TRIP_HELD, will produce trip outputs if the combined pre-
trip and bipolar timers determine that a valid trip condition exists. If a valid trip does exist, the
transistors will drive the TROUT_RLY1 (C20) and TROUT_SS (A22) outputs, energizing the electro-
mechanical and solid-state trip relays. The active TROUT_SS output is a 32 kHz 50% duty-cycle
signal. The trip outputs will remain energized for the duration of a valid trip, including any preset time
interval of the trip-hold timer.
TRIP indicator DS2 will illuminate to show that a valid trip input has been received and a trip output
has been generated. If desired, the 9780 Logic Module can be configured to latch the TRIP indicator
(DS2). The TRIP RESET button (SW11) located at the front of the board (protruding through the 9780
chassis) is used to reset the indicators.
If an abnormal condition causes the alarm to pick up, the output will be blocked until the abnormal
condition ceases and the alarm drops out.
If an under-voltage condition is detected, the PWR_FAIL and/or POWERFAIL2 inputs to the 9780
Logic Module will be logic-low. Both signals in the logic-low state will generate a logic-low POWER
signal to block the trip outputs for the period of the under-voltage condition plus an additional 600 ms.
The status of the trip output circuit is recorded by the sequence of events module (Section 15).
To Next Page
Loading...