Safran CORTEX CRT Quantum - Hardware Investigation & Repair; LED Indicators; Analog Downlink Board; Analog Uplink Board

COMMAND RANGING & TELEMETRY UNIT CORTEX
CRT QUANTUM USER'S MANUAL
Ref. DTU 100042
Is.Rev. 5.17
Date: Dec.
03, 2021Sept. 30, 2021
© Safran Data Systems
This document is the property of Safran Data Systems.
It cannot be duplicated or distributed without expressed written consent.
Page 257
5.2. Hardware Investigation & Repair
5.2.1. LED Indicators
5.2.1.1. Analog Downlink Board
The analog Downlink board is one of the boards constituting the Main Signal Processing board. It is the one
dedicated to the six IF downlink inputs. Five LEDs are located on this printed circuit board (open the top cover to
check them). See Annex 2.
D1
Red LED. Illuminates to indicate that an IF input ADC is overloaded (shall not be illuminated in
regular operations).
D2
Yellow LED. Illuminates to indicate that the local FPGA Digital Clock Manager is unlocked
(shall not be illuminated in regular operations).
D3
Green LED. Blinking at 2 Hz to show that the 250 MHz reference clock is present in the local
FPGA (shall blink at 2 Hz in regular operations).
D4
Green LED. Blinking at 1 Hz to show that the 125 MHz reference from the digital mother board
is present in the local FPGA (shall blink at 1 Hz in regular operations).
D5
Green LED. Illuminates to indicate that the local FPGA has been correctly downloaded by the
SPS application (DONE signal, shall be illuminated in regular operations).
At power-on unit, all the LEDs shall be illuminated, except D5.
5.2.1.2. Analog Uplink Board
The analog Uplink board is one of the boards constituting the Main Signal Processing board. It is the one
dedicated to the IF uplink outputs and the reference clock inputs. Five LEDs are located on this printed circuit
board (open the top cover to check them). See Annex 2.
D1
Green LED. Blinking at 2 Hz to show that the 250 MHz reference clock is present in the local
FPGA (shall blink at 2 Hz in regular operations).
D2
Yellow LED. Illuminates to indicate that the IFM#2 DAC Digital Clock Manager is unlocked
(shall not be illuminated in regular operations).
D3
Red LED. Illuminates to indicate that one of the IF output DACs does not work correctly (shall
not be illuminated in regular operations).
D4
Green LED. Blinking at 1 Hz to show that the 125 MHz reference from the digital mother board
is present in the local FPGA (shall blink at 1 Hz in regular operations).
D5
Green LED. Illuminates to indicate that the local FPGA has been correctly downloaded by the
SPS application (DONE signal, shall be illuminated in regular operations).
At power-on unit, all the LEDs shall be illuminated, except D5.