17
8331B–AVR–03/12
Atmel AVR XMEGA AU
ECALL/EIJMP are used, and it will not be used if CALL and IJMP commands are used. For jump
or call to addresses below 128KB, this register is not used. This register is not available if the
program memory in the device is less than 128KB.
• Bit 7:0 – EIND[7:0]: Extended Indirect Address bits
These bits hold the MSB of the 24-bit address created by EIND and the 16-bit Z-register. Only
the number of bits required to access the available program memory is implemented for each
device. Unused bits will always read as zero.
3.14.7 SPL – Stack Pointer Register Low
The SPH and SPL register pair represent the 16-bit SP value. The SP holds the stack pointer
that points to the top of the stack. After reset, the stack pointer points to the highest internal
SRAM address. To prevent corruption when updating the stack pointer from software, a write to
SPL will automatically disable interrupts for the next four instructions or until the next I/O mem-
ory write.
Only the number of bits required to address the available data memory, including external mem-
ory, up to 64KB is implemented for each device. Unused bits will always read as zero.
Note: 1. Refer to specific device datasheets for exact initial values.
• Bit 7:0 – SP[7:0]: Stack Pointer Register Low
These bits hold the LSB of the 16-bit stack pointer (SP).
3.14.8 SPH – Stack Pointer Register High
Note: 1. Refer to specific device datasheets for exact initial values.
• Bit 7:0 – SP[15:8]: Stack Pointer Register High
These bits hold the MSB of the 16-bit stack pointer (SP).
Bit 76543210
+0x0C EIND[7:0] EIND
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 00000000
Bit 76543210
+0x0D SP[7:0] SPL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value
(1)
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Bit 76543210
+0x0E SP[15:8] SPH
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value
(1)
0/10/10/10/10/10/10/10/1
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