Atmel AVR XMEGA AU series

202
8331B–AVR–03/12
Atmel AVR XMEGA AU
• Bit 1:0 – CMDEN[1:0]: Command Enable
These bits are used to indicate for which timer/counter the command (CMD) is valid.
15.10.8 INTFLAGS – Interrupt Flag register
• Bit 7:4 – LCMPxIF: Compare Channel x Interrupt Flag
The compare interrupt flag (LCMPxIF) is set on a compare match on the corresponding CMP
channel.
For all modes of operation, LCMPxIF will be set when a compare match occurs between the
count register (LCNT) and the corresponding compare register (LCMPx). The LCMPxIF is auto-
matically cleared when the corresponding interrupt vector is executed. The flag can also be
cleared by writing a one to its bit location.
• Bit 3:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 1 – HUNFIF: High-byte Timer Underflow Interrupt Flag
HUNFIF is set on a BOTTOM (underflow) condition. This flag is automatically cleared when the
corresponding interrupt vector is executed. The flag can also be cleared by writing a one to its bit
location.
• Bit 0 – LUNFIF: Low-byte Timer Underflow Interrupt Flag
LUNFIF is set on a BOTTOM (underflow) condition. This flag is automatically cleared when the
corresponding interrupt vector is executed. The flag can also be cleared by writing a one to its bit
location.
15.10.9 LCNT – Low-byte Count register
• Bit 7:0 – LCNT[7:0]
LCNT contains the eight-bit counter value for the low-byte timer/counter. The CPU and DMA
write accesses have priority over count, clear, or reload of the counter.
Table 15-5. Command selections.
CMD Group Configuration Description
00 — Reserved
01 LOW Command valid for low-byte T/C
10 HIGH Command valid for high-byte T/C
11 BOTH Command valid for both low-byte and high-byte T/C
Bit 76543210
+0x0C LCMPDIF LCMPCIF LCMPBIF LCMPAIF – – HUNFIF LUNFIF INTFLAGS
Read/Write R/W R/W R/W R/W R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x20 LCNT[7:0] LCNT
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000