375
8331B–AVR–03/12
Atmel AVR XMEGA AU
• Bit 3:0 – CH[3:0]IF: Interrupt Flags
These flags are set when the ADC conversion is complete for the corresponding ADC channel. If
an ADC channel is configured for compare mode, the corresponding flag will be set if the com-
pare condition is met. CHnIF is automatically cleared when the ADC channel n interrupt vector is
executed. The flag can also be cleared by writing a one to its bit location.
28.16.7 TEMP – Temporary register
• Bit 7:0 – TEMP[7:0]: Temporary Register
This register is used when reading 16-bit registers in the ADC controller. The high byte of the 16-
bit register is stored here when the low byte is read by the CPU. This register can also be read
and written from the user software.
For more details on 16-bit register access, refer to ”Accessing 16-bit Registers” on page 13.
28.16.8 CALL – Calibration Value register
The CALL and CALH register pair hold the 12-bit calibration value. The ADC pipeline is cali-
brated during production programming, and the calibration value must be read from the
signature row and written to the CAL register from software.
• Bit 7:0 – CAL[7:0]: ADC Calibration value
These are the eight lsbs of the 12-bit CAL value.
28.16.9 CALH – Calibration Value register
• Bit 3:0 – CAL[11:8]: Calibration value
These are the four msbs of the 12-bit CAL value.
Bit 76543210
+0x07 TEMP[7:0] TEMP
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
+0x0C CAL[7:0] CALL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x0D – – – – CAL[11:8] CALH
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
To Next Page
Loading...
Need help?
General
