LSIS sv-ip5a - PID Block Diagram

Chapter 6 - Parameter Description [APP]
6-58
PID F/B Selection
Accel
/Decel
wTarFreq
DRV-14
Target Freq.
APP-
02
proc PI mode
PID
K
f
Limit
APP-10
PID
High Limit Freq.
proc PI dis
APP-12
Gain
APP-11
PID
Low Limit Freq.
I/O-20~27
Multi-function Input
Terminal Setting
(M1~M8)
PID Output
Scale
PID F Gain: Feed Foward
DRV-04
PID Aux Ref Setting
Freq
APP-03
APP-04
Aux Ref Mode
Keypad-1 Keypad-2
V1
V1S
I
V1+I
Pulse
Int.485
Ext. PID
Aux Ref Sel
0 1 2 3 4 5 6 7 8
Jog Freq
Up Down Freq
Keypad-1 Keypad-2
V1
V1S
I
V1+I
Pulse
Int.485
Ext. PID
Freq Mode
0 1 2 3 4 5 6 7 8
V1
I
Pulse
PID F/B
0 1 2
APP-05
I/O-20~27
Multi-function Input
Terminal Setting
(M1~M8)
Step Freq-1 Step Freq-2 Step Freq-3
Step Freq-13 Step Freq-14 Step Freq-15
Speed-L,
-M,-H,-X
APP-06
Inverter Ref. Freq Setting
PID Block Dia
g
ram