Index
IN-4 Computer Group Literature Center Web Site
I
N
D
E
X
overview 2-1, 3-1
P
parity checking 3-58
PC87308VUL Super I/O (ISASIO) strapping
1-24
PCI arbitration 4-1
PCI arbitration assignments 4-2
PCI CHRP memory map 1-10
PCI command codes 2-11
PCI Command/ Status Registers 2-39
PCI configuration access 1-10
PCI configuration space 2-10
PCI domain 4-13
PCI I/O CONFIG_ADDRESS Register 2-45
PCI I/O CONFIG_DATA Register 2-47
PCI interface 2-9
PCI Interrupt Acknowledge Register 2-32
PCI map decoders 2-9
PCI master 2-11
PCI memory maps 1-10
PCI PREP memory map 1-12
PCI registers 2-37
PCI Slave Address (0,1,2 and 3) Registers
2-43
PCI Slave Attribute/ Offset (0,1,2 and 3)
Registers 2-44
PCI spread I/O cycle mapping 2-13
PCI write posting 2-10
PCI/MPC contention handling 2-18
PCI-Ethernet 4-13
PCI-SCSI 4-13
performance 3-6
PIB DMA channel assignments 1-32
PIB interrupt handler block diagram 4-6
PIB PCI/ISA interrupt assignments 4-7
PowerPC 60x to ROM/Flash Address Map-
ping when ROM/Flash is 16 Bits
Wide (8 Bits per Falcon) 3-20
PowerPC 60x to ROM/Flash Address Map-
ping when ROM/Flash is 64 Bits
Wide (32 Bits per Falcon) 3-21
power-up reset status bit 3-38
Power-Up Reset Status Register 1 3-56
Power-Up Reset Status Register 2 3-57
PR_STAT1 bits 3-56
PR_STAT2 bits 3-57
PREP memory map example 1-8
Prescaler Adjust Register 2-25
processor CHRP memory map 1-6
Processor Init Register 2-63
processor memory maps 1-5
processor PREP memory map 1-8
processor/memory domain 4-12
processor’s current task priority 2-49
program visible registers 2-54
programming details 4-1
programming model 1-5
programming notes 2-74
programming ROM/Flash 3-58, 3-59
R
RAM A BASE 3-37
RAM B BASE 3-37
RAM C BASE 3-37
RAM D BASE 3-37
Raven block diagram 2-3
Raven interrupt controller (RavenMPIC) fea-
tures 2-47
Raven interrupt controller implementation
2-47
Raven MPC register map 2-21
Raven MPC register values for CHRP mem-
ory map 1-8
Raven MPC register values for PREP memo-
ry map 1-9
Raven PCI configuration register map 2-37
Raven PCI Host Bridge & Multi-Processor
Interrupt Controller chip 2-1
Raven PCI I/O register map 2-38
Raven PCI register values for CHRP memory
map 1-11
Raven PCI register values for PREP memory
map 1-12