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5-14-16DOUBLE SHIFT RIGHT: ASRL(065)
(065)
ASRL Wd
Wd: Word CIO, G, A, DM
Operand Data AreaLadder Symbol
Variations
j ASRL(065)
When the execution condition is OFF, ASRL(065) is not executed. When the ex-
ecution condition is ON, ASRL(065) shifts a 0 into bit 15 of Wd+1, all bits pre-
viously in Wd and Wd+1 are shifted to the right, and bit 00 of Wd is shifted into
CY.
0
CY
Wd+1
Wd
Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): Content of *DM word is not BCD when set for BCD.
CY (A50004): Receives the status of bit 00 from Wd.
EQ (A50006): Content of Wd and Wd+1 are 0 after a shift.
N (A50008): Same status as bit 15 of Wd+1 after shift.
Example When CIO 000000 is ON in the following example, 0 is shifted into bit 15 of
D01001, the status of all bits within D01001 are shifted right one position, the
status of bit 00 of D01001 is shifted to bit 15 of D01000, the status of all bits within
D01000 are shifted right one position, and the status of bit 00 is shifted to CY.
Address Instruction Operands
00000 LD 000000
00001 ASRL(065)
D01000
0 0 1 0 0
MSBLSBMSB
0
CYLSB
0
MSBLSBMSB CYLSB
Wd+1: D01001
Wd: D01000
Wd: 01000
Wd+1: D01001
1 0 0 1 1
1 0 0 1 01 0 0 1 1
Description
Precautions
Shift Instructions Section 5-14
0000
00
(065)
ASRL D01000
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