Omron SYSMAC CV Series - Index and Data Registers (IR and DR)

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Word Content
D00099 4C59
D00100 0200
D00101 F35A
CIO 0512 5555
CIO 0513 2506
CIO 0514 D541
5555 moved
to A090.
Indicates
CIO 0512.
Indirect
address
(030)
MOV *D00100 A090
Indirect addressing can also be used in instructions that require bit operands
for bits in the Core I/O Area ($0000 to $0FFF). These bits are designated by
using the rightmost digits of the memory address as the leftmost three digits
of the hexadecimal address and adding the bit number as the rightmost digit.
For example, the CIO bit 190000 is designated by $76CA where 76C is the
rightmost three digits of the memory address (CIO word 1900 is $076C) and
A is bit 10.
3-12 Index and Data Registers (IR and DR)
The Index Registers, IR0, IR1, and IR2, which contain a single word of data, are
used for indirect addressing. A “,” prefix is included before an Index Register to
indicate indirect addressing, just as the “*” prefix is used to indicate indirect ad-
dressing with DM and EM.
If an Index Register is used as an operand in an instruction without the “,”
prefix, the instruction is performed directly on the content of that Index Regis-
ter, as in the following example.
08FC moved
to IR0.
Word Content
D00000 08FC
Word Content
IR0 08FC
(030)
MOV D00000 IR0
If an Index Register is used as an operand in an instruction with the “,” prefix,
the instruction is performed on the word at the PC memory address indicated
by that Index Register, as in the following example.
Word Content
IR0 076C
08FC moved
to CIO 1900.
Indicates 076C
(CIO 1900)
Indirect
address
Word Content
D00000 08FC
Word Content
CIO 1900 08FC
(030)
MOV D00000 ,IR0
Indirect addressing can also be used in instructions that require bit operands
for bits in the Core I/O Area ($0000 to $0FFF). These bits are designated by
using the rightmost digits of the memory address as the leftmost three digits
Direct Addressing
Indirect Addressing
Index and Data Registers (IR and DR) Section 3-12