Omron SYSMAC CV Series - Multiple Bit SetReset: Seta(047)Rsta(048)

0000
00
0050
00
0500
00
0000
01
(016)
SET 050000
(017)
RSET 050000
130
Precautions The status of operand bits for SET(016) and RSET (017) programmed between
IL(002) and ILC(003) or JMP(004) and JME(005) will not change when the inter-
lock or jump condition is met (i.e., when IL(002) or JMP(004) is executed with an
OFF execution condition).
Note: Refer to page 115 for general precautions on operand data areas.
Flags There are no flags affected by these instructions.
Example In the example below, CIO 050000 is turned ON whenever CIO 000000 is ON,
and turned OFF whenever CIO 000001 is ON.
Address Instruction Operands
00000 LD 000000
00001 SET(016) 050000
00002 LD 050000
00003 OUT 005000
00004 LD 000001
00005 RSET(017) 050000
5-7-4 MULTIPLE BIT SET/RESET: SETA(047)/RSTA(048)
(047)
SETA D N
1
N
2
Operand Data AreaLadder Symbol
Variations
↑SETA(047), ↑RSTA(048)
(048)
RSTA D N
1
N
2
N
1
: Beginning bit CIO, G, A, T, C, #, DM, DR, IR
N
2
: Number of bits CIO, G, A, T, C, #, DM, DR, IR
D: Rightmost word for set CIO, G, A
Description When the execution condition is OFF, SETA(047) is not executed. When the
execution condition is ON, SETA(047) turns ON a designated number of bits,
beginning from the designated bit of the designated word, and continuing to the
left (more-significant bits). All other bits are left unchanged.
Unchanged Number of bits
Rightmost word
Unchanged
Beginning bit
When the execution condition is OFF, RSTA(048) is not executed. When the
execution condition is ON, RSTA(048) turns OFF a designated number of bits,
beginning from the designated bit of the designated word, and continuing to the
left (more-significant bits). All other bits are left unchanged.
Unchanged Number of bits
Rightmost word
Unchanged
Beginning bit
(CVM1 V2)
Bit Control Instructions Section 5-7