67
Input the transition number as a bit operand when designating Transition Flags
in instructions.
The CVM1 does not support SFC programming and is not equipped with a Tran-
sition Area.
3-8 Step Area
A step in the program represents a single process. All SFC programs are
executed by step. Each step must have its own unique step number. Flags in the
Step Area are turned ON to indicate that a step is active.
The CV500 has 512 Step Flags, numbered ST0000 to ST0511, and the CV1000
or CV2000 has 1,024 Step Flags, numbered ST0000 to ST1023. Input the step
number as a bit operand when designating Step Flags in instructions.
The CVM1 does not support SFC programming and is not equipped with a Step
Area.
3-9 Timer Area
Timer Completion Flags and present values (PV) are accessed through timer
numbers ranging from T0000 through T0511 for the CV500 or
CVM1-CPU01-EV2 and from T0000 through T1023 for the CV1000, CV2000,
CVM1-CPU11-EV2, or CVM1-CPU21-EV2. Each timer number and its set
value (SV) are defined using timer instructions. No prefix is required when
using a timer number to create a timer in one of these instructions.
The same timer number can be defined using more than one of these
instructions as long as the instructions are not executed in the same cycle. If
the same timer number is defined in more than one of these instructions or in
the same instruction twice, an error will be generated during the program
check, but as long as the instructions are not executed in the same cycle,
they will operate correctly. There are no restrictions on the order in which tim-
er numbers can be used.
Once defined, a timer number can be designated as an operand in one or
more of certain instructions. Timer numbers can be designated for operands
that require bit data or for operands that require word data. When designated
as an operand that requires bit data, the timer number accesses the Comple-
tion Flag of the timer. The Completion Flag will be ON when the timer has
timed out. When designated as an operand that requires word data, the timer
number accesses a memory location that holds the PV of the timer.
Timer PVs are reset when PC operation is begun, when the CNR(236)
instruction is executed, and when in interlocked program sections when the
execution condition for IL(002) is OFF. Refer to
5-8 Interlock and Interlock
Clear – IL(02) and ILC(03)
for details on timer operation in interlocked pro-
gram sections.
When the cycle time exceeds 10 ms, define TIMH(015) instructions with timer
numbers T0000 through T0127 for the CV500 or CVM1-CPU01-EV2, and
T0000 through T0255 for the CV1000, CV2000, CVM1-CPU11-EV2, or
CVM1-CPU21-EV2, to ensure accuracy.
TIM timers are not affected by the cycle time, but TTIM(120) timers time slowly if
the cycle time exceeds 100 ms.
Timer Area Section 3-9
To Next Page
Loading...
