55
If the IOM Hold Bit is ON, and the status of the IOM Hold Bit itself is pre-
served in the PC Setup (Setting B, IOM Hold Bit status), then I/O Memory is
also preserved when the PC is turned ON or power is interrupted.
3-6-3 Forced Status Hold Bit
Bit A00013 can be turned ON to preserve the status of bits that have been
force-set or force-reset when switching modes (except RUN mode). When
the Forced Status Hold Bit is OFF, bits that have been force-set or force-re-
set will return to default status when switching between modes.
If the Forced Status Hold Bit is ON, and the status of the Forced Status Hold
Bit itself is preserved in the PC Setup (Setting B, Forced Status Hold Bit sta-
tus), then the status of bits that have been force-set or force-reset is also pre-
served when the PC is turned ON or power is interrupted.
In any case, bits that have been force-set or force-reset will return to default sta-
tus when switching to RUN mode.
3-6-4 Error Log Reset Bit
Bit A00014 can be turned ON to clear the contents of the Error Log Area
(words A100 to A199), and reset the Error Record Pointer to 0. The Error Log
Reset Bit is automatically turned OFF after the Error Log Area is cleared.
3-6-5 Output OFF Bit
Bit A00015 can be turned ON to turn OFF all outputs from the PC. The OUT
INH. indicator on the front panel of the CPU will light. The Output OFF Bit is
turned ON automatically when Restart Continuation (bit A00011) has taken
place. It is therefore necessary to include a step in the program to turn this bit
OFF to continue operation after a power interruption. Refer to
6-1 PC Opera-
tion
for details.
3-6-6 CPU Bus Unit Restart Bits
Bits A00100 through A00115 can be turned ON to reset CPU Bus Units number
#0 through #15, respectively. The Restart Bits are turned OFF automatically
when restarting is completed.
Do not turn these bits ON and OFF in the program; manipulate them from the
CVSS/SSS.
3-6-7 SYSMAC BUS Error Check Bits
Bits A00500 through A00507 can be turned ON to read out the error codes
(stored in words A470 through A477) for Masters numbered #0 through #7, re-
spectively. The Error Check Bits are turned OFF automatically after the informa-
tion has been read out. Refer to
3-6-35 SYSMAC BUS Error Flag
for more de-
tails.
3-6-8 Momentary Power Interruption Time
Word A007 contains the duration of the most recent power interruption. The
time is recorded in 4-digit BCD in milliseconds (0000 ms to 9999 ms), as
shown in the following table.
Bits
15 to 12 11 to 08 07 to 04 03 to 00
10
3
10
2
10
1
10
0
Auxiliary Area Section 3-6
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