0000
00
(087)
DVBL 0100 D00500 D00200
270
F8AA
D00010
X
095A
D00011
00FF0000
B156
D00020
519D
D00021
0009
D00022
0000
D00023
5-19-8 DOUBLE BINARY DIVIDE: DVBL(087)
Variations
j DVBL(087)
(087)
DVBL Dd Dr R
Operand Data AreasLadder Symbol
Dd: 1
st
dividend word CIO, G, A, T, C, #, DM
R: 1
st
result word CIO, G, A, DM
Dr: 1
st
divisor word CIO, G, A, T, C, #, DM
When the execution condition is OFF, DVBL(087) is not executed. When the
execution condition is ON, the 8-digit content of Dd and D+1 is divided by the
content of Dr and Dr+1 and the result is placed in R to R+3: the quotient in R and
R+1, and the remainder in R+2 and R+3.
R+1 R
QuotientRemainder
Dd+1 DdDr+1 Dr
R+3 R+2
Note With version-2 CVM1 CPUs, mathematics instructions can use symbols. The
instructions corresponding to DVB(083) and DVBL(085) are /U(432) and /
UL(433). In addition, Overflow (A50009) and Underflow (A50010) Flags are
added.
Dr and Dr+1 must not contain 0.
Constants are expressed in eight digits.
Note Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): Dr and Dr+1 contain 0.
Content of *DM word is not BCD when set for BCD.
EQ (A50006): The result is 0.
N (A50008): Shows the status of bit 15 of R+1.
Example When CIO 000000 is ON in the following example the content of CIO 0100 and
CIO 0101 is divided by the content of D00500 and D00501 and the results is out-
put to D00200 through D00203.
Address Instruction Operands
00000 LD 000000
00001 DVBL(087)
0100
D00500
D00200
Description
Precautions
Binary Calculation Instructions Section 5-19