297
Only the integer portion of the floating-point data is converted, and the fraction
portion is truncated. For example, “3.5” becomes “3,” and “–3.5” becomes “–3.”
Precautions S must be floating-point data between –32,768 and 32,767.
Note Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): S is not floating-point data.
The floating-point data is not between –32,768 to 32,767.
The content of a*DM word is not BCD when set for BCD.
EQ (A50006): The converted binary data is all zeroes.
N (A50008): The result of the conversion is a negative number.
5-21-2 FLOATING TO 32-BIT: FIXL(451)
(451)
FIXL S R
Ladder Symbol
Variations
↑FIXL(451)
Operand Data Areas
S: First source word CIO, G, A, T, C, #, DM
R: First result word CIO, G, A, DM,
When the execution condition OFF, FIXL(451) is not executed. When the execu-
tion condition is ON, FIXL(451) converts the 32-bit floating-point content of S
and S+1 to 32-bit binary data, and places the result in R and R+1.
S+1 S Floating-point data (32 bits)
Binary data (32 bits)
R+1 R
Only the integer portion of the floating-point data is converted, and the fraction
portion is truncated.
Note The maximum value for R other than indirect DM and indirect EM is –1.
Constants are expressed in eight digits. Data register and index register (direct)
cannot be used.
Precautions S must be floating-point data between –2,147483648 and 2,147483647.
Note Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): S is not floating-point data.
Floating-point data is not between –2,147483648 to
2,147483647.
The content of a*DM word is not BCD when set for BCD.
EQ (A50006): The converted binary data is all zeroes.
N (A50008): The result of the conversion is a negative number.
Description
(CVM1 V2)
Floating-point Math Instructions
Section 5-21
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