Omron SYSMAC CV Series - Double Binary Subtract: Sbbl(085)

0000
00
(079)
CLC
(085)
SBBL D00100 0200 D00500
268
5-19-6 DOUBLE BINARY SUBTRACT: SBBL(085)
Variations
j SBBL(085)
(085)
SBBL Mi Su R
Operand Data AreasLadder Symbol
Mi: 1
st
minuend word CIO, G, A, T, C, #, DM
R: 1
st
result word CIO, G, A, DM
Su: 1
st
subtrahend wordCIO, G, A, T, C, #, DM
When the execution condition is OFF, SBBL(085) is not executed. When the
execution condition is ON, SBBL(085) subtracts CY and the 8-digit value in Su
and Su+1 from the 8-digit value in Mi and Mi+1, and places the result in R and
R+1. If the result is negative, CY is set and the 2’s complement of the actual re-
sult is placed in R. To convert the 2’s complement to the true result, subtract the
content of R from zero.
Mi + 1 Mi
Su + 1 Su
R + 1 R
–
CY
CY
Note With version-2 CVM1 CPUs, mathematics instructions can use symbols. The
instructions corresponding to SUB(081) and SUBL(085) are –C(412) and –
CL(413). In addition, Overflow (A50009) and Underflow (A50010) Flags are
added.
Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): Content of *DM word is not BCD when set for BCD.
CY (A50004): The result is negative.
EQ (A50006): The result is 0.
N (A50008): Shows the status of bit 15 of R+1.
In this example, the 8-digit number in CIO 0201 and CIO 0200 is subtracted
from the 8-digit number in D00101 and D00100 when CIO 000000 is ON, and the
result is output to D00501 and D00500. If the result is negative, CY (A50004) is
turned ON and the 2’s complement of the result is output to D00501 and
D00500. Refer to 5-19-2 BINARY SUBTRACT: SBB(081) for an example of con-
verting a 2’s complement.
Address Instruction Operands
00000 LD 000000
00001 CLC(079)
00002 SBBL(085)
D00100
0200
D00500
Description
Precautions
Example
Binary Calculation Instructions Section 5-19