364
0000001110000010
Set to 0
Rack no. 2
Set to 0
I/O Interface Unit
Segment specified
Blinking indication
Automatic indication
MSB
D15000
LSB
0111011100111111
7
CIO 0201
73F
gfedcba gfedcba
(LED4)
(LED3)
(LED2) (LED1)
0110110100000110
gfedcba gfedcba
D
CIO 0200
606
R
M
0
R
M
1
Rack no. 0
Rack no. 1
Rack no. 2
RT address 0
R
T
0
RT address 1
R
T
1
RT address 2
R
T
2
773F6D06
MSB CIO 0201 CIO 0200 LSB
5-27-6 SELECT EM BANK: EMBC(171)
(171)
EMBC N
N: EM bank number CIO, G, A, #, DM, DR, IR
Operand Data AreaLadder Symbol
Variations
j EMBC(171)
When the execution condition is OFF, EMBC(171) is not executed. When the
execution condition is ON, EMBC(171) changes the current EM bank to the one
indicated by the EM bank number (N).
The current EM bank number is recorded in the least significant (rightmost) digit
of A511. Bit A51115 is ON when EM is mounted to the CPU.
When power returns to the CPU after an interruption, the current EM bank num-
ber will revert to the bank number recorded in A511 before the power was inter-
rupted, even if EMBC(171) is used in a power OFF interruption program to
change the current bank number regardless of the IOM Hold settings.
N must be between 0000 and 0007.
EMBC(171) can be used only with CPUs that support the EM Area.
Note Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): N is not between 0000 and 0007.
The EM Unit does not have the EM bank indicated by N, or
the indicated bank is being used as file memory.
The CPU does not support the EM Area.
Content of *DM word is not BCD when set for BCD.
Description
Precautions
Special Instructions Section 5-27
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