Omron SYSMAC CV Series - Double Shift N-Bits Right: Nsrl(059)

172
5-14-10DOUBLE SHIFT N-BITS RIGHT: NSRL(059)
Operand Data Areas
(
059
)
NSRL D C
Ladder Symbol
Variations
↑NSRL(059)
D: Shift word address CIO, G, A, DM,
C: Control word CIO, G, A, T, C, #, DM,
When the execution condition is OFF, NSRL(059) is not executed. When the ex-
ecution condition is ON, NSRL(059) shifts the status of the 32 bits in the speci-
fied words to the right the specified number of bits.
The number of bits to shift is set in the two rightmost digits of the control word. If
the number is “0,” the word data will not be shifted. The appropriate flags will turn
ON and OFF, however, according to data in the specified word.
CY
Wd D
. . . .
Number of bits shifted
A5004
. . . .
Wd D+1
After the bits have been shifted, the status of the bits from which data was shifted
(i.e., the number of bits shifted, beginning with the leftmost bit of the specified
word) will be set to “0” or to the status of the MSB, depending on the control word
setting.
Number of bits to shift (00 to 32)
Control Word Contents
MSB LSB
Status of remaining bits
0: 0
8: Status of MSB
0
Precautions Refer to page 115 for general precautions on operand data areas.
Flags ER (A50003): Number of bits to shift is out of range.
Content of a*DM word is not BCD when set for BCD.
CY (A50004): “1” has been shifted to CY.
EQ (A50006) Content of word D and D+1 after the shift is all zeros.
N (A50008) Same as leftmost bit (MSB) of word D+1 after shift.
Example When CIO 000000 is ON in the following example, the 32 bits in D00200 and
D00201 are shifted three bits to the right. The status of the three leftmost bits of
D00201 are set to “0.”
Address Instruction Operands
00000 LD 000000
00001 NSLL(059)
D00200
#8003
Description
(CVM1 V2)
Shift Instructions Section 5-14
(059)
NSLL D00200 #8003
0000
00