82
The following diagram requires an OR LOAD instruction between the top logic
block and the bottom logic block. An ON execution condition would be produced
for the instruction at the right either when CIO 000000 is ON and CIO 000001 is
OFF or when CIO 000002 and CIO 000003 are both ON. The operation of and
mnemonic code for the OR LOAD instruction is exactly the same as those for a
AND LOAD instruction except that the current execution condition is ORed with
the last unused execution condition.
0000
00
0000
01
0000
02
0000
03
InstructionInstruction
Address Instruction
00000 LD 000000
00001 AND 000001
00002 LD 000002
00003 AND NOT 000003
00004 OR LD ---
Operands
Naturally, some diagrams will require both AND LOAD and OR LOAD instruc-
tions.
To code diagrams with logic block instructions in series, the diagram must be
divided into logic blocks. Each block is coded using a LOAD instruction to code
the first condition, and then AND LOAD or OR LOAD is used to logically combine
the blocks. With both AND LOAD and OR LOAD there are two ways to achieve
this. One is to code the logic block instruction after the first two blocks and then
after each additional block. The other is to code all of the blocks to be combined,
starting each block with LOAD or LOAD NOT, and then to code the logic block
instructions which combine them. In this case, the instructions for the last pair of
blocks should be combined first, and then each preceding block should be com-
bined, working progressively back to the first block. Although either of these
methods will produce exactly the same result, the second method, that of coding
all logic block instructions together, can be used only if eight or fewer blocks are
being combined, i.e., if seven or fewer logic block instructions are required.
The following diagram requires AND LOAD to be converted to mnemonic code
because three pairs of parallel conditions lie in series. The two means of coding
the programs are also shown.
00000 LD 000000
00001 OR NOT 000001
00002 LD NOT 000002
00003 OR 000003
00004 LD 000004
00005 OR 000005
00006 AND LD ---
00007 AND LD ---
00008 OUT 000500
0000
00
0000
02
0000
01
0000
03
0000
05
0000
04
0005
00
Address Instruction Operands
Address Instruction Operands
00000 LD 000000
00001 OR NOT 000001
00002 LD NOT 000002
00003 OR 000003
00004 AND LD ---
00005 LD 000004
00006 OR 000005
00007 AND LD ---
00008 OUT 000500
OR LOAD
Logic Block Instructions in
Series
Mnemonic Code Section 4-4
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