AMD CBS Option Description
SEV-ES ASID Space Limit With Force APCB Update enabled, allows you to set space limits for
Secure Encrypted Virtualization-Encrypted State address space
identifier (SEV-ES ASID). SEV-ES and AMD Secure Nested Paging
(SNP) guests must use ASIDs in the range 1 through 1086. For all
ASIDs to support SEV-ES or SNP guests, set the value to 1007.
The default is 1 which sets the space limits for all SEV guests and
no SEV-ES or SNP guests.
SEV Control With Force APCB Update enabled, allows you to enable (default) or
disable SEV. To re-enable SEV, after you select Enable, run a power
cycle.
SNP Memory (RMP Table) Coverage With Force APCB Update enabled, allows you to enable, disable, or
customize the entire system memory. Default is Auto.
SMEE With Force APCB Update enabled, allows you to enable or disable
secure memory encryption enable (SMEE). Enabling both SMEE
and Multi-Key Secure Memory Encryption (SME-MK) is not
supported. Default is Auto.
Enhanced REP MOVSB/STOSB (ESRM) With Force APCB Update enabled, allows you to enable (default) or
disable memory security for Enterprise Security Management
(ESRM). Default is 1. You can set the option to zero for analysis
purposes, providing that the OS supports the option.
DF Common Options
Memory Addressing
NUMA Nodes Per Socket With Force APCB Update enabled, allows you to specify the number
of non-uniform memory access (NUMA) nodes per socket. Default is
Auto. NPS1 specified one NUMA node per socket. NPS0 specified
one NUMA node per system and attempts to interleave the two
sockets together.
Memory Interleaving With Force APCB Update enabled, allows you to disable or enable
memory interleaving. NUMA nodes per socket are recognized
regardless of this setting. Default is Auto.
1TB Remap With Force APCB Update enabled, allows you to reamap DRAM out
of the space below the 1TB bounday. Remapping depends on the
DRAM configuration, NUMA node per socket (NPS), and
interleaving selection, and might not always be possible. Default is
Auto.
DRAM Map Intervention With Force APCB Update enabled, allows you to invert the map so
that the highest memory channels are assigned to the lowest
addresses in the system. Default is Auto.
Location of Private Memory Regions With Force APCB Update enabled, allows you to control whether
the private memory regions (PSP, SMU and CC6) are at the top of
DRAM, at the top of the 1st DRAM pair, or distributed. The
Distributed option requires memory on all dies. The location of the
private memory regions is always at the top of DRAM if some dies
do not have memory, regardless of the setting. The Consolidate
option for the first DRAM pair is only valid for non-interleaved
memory. Default is Auto.
Link With Force APCB Update enabled, allows you to specify the
maximum frequency for the inter-chip global memory interconnect
(XGMI) PState in a 4-link or 3-link topology. Default is Auto.
UMC Common Options
DDR Controller Configuration
Appendix F
Advanced Menu
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