Oracle Exadata X10M User Manual

PSP Firmware Versions Option Description
MMPDMA FW Version Displays the Microprocessor Direct Memory Access (MMPDMA)
firmware (FW) version.
Page Migration FW Displays the Page Migration firmware (FW) version.
GMI FW Version Displays the Global Memory Interconnect (GMI) firmware (FW)
version.
uCode B0 Version Displays the CPU stepping version, for example, B0.
APCB Version Displays the AMD ASP Configuration Block (APCB) version.
APOB Version Displays the AMD Generic Encapsulated Software Architecture
(AGESA) PSP Outbput Buffer (APOB) version.
APPB Version Displays the AGESA PSP PMU Block (APPB) version.
AMD CBS
AMD CBS Option Description
AMD CBS Revision Number Displays the AMD CBS revision number.
CPU Common Options
Performance
OC Mode With Force APCB Update enabled, allows you to customize
overclock mode with Normal Operation or Customized settings.
CCD/Core/Thread Enablement
CCD Control With Force APCB Update enabled, allows you to select the number
of active charge couple devices (CCDs). After you use this option to
remove any CCDs, run a power cycle so that the settings you select
in the future take effect. Default is Auto.
Core Control With Force APCB Update enabled, allows you to select the number
of cores you want to use. After you use this option to remove any
cores, run a power cycle so that the settings you select in the future
take effect. Default is Auto.
SMT Control With Force APCB Update enabled, you can disable symmetric
multithreading (SMT). To re-enable SMT, select Enable and run a
power cycle. Select Auto, based on the BIOS PCD
(PcdAmdSmtMode) default setting. S3 is not supported on systems
where SMT is disabled.
Prefetcher Settings
L1 Stream HW Prefetcher With Force APCB Update enabled, allows you to enable (default) or
disable the L1 Stream HW Prefetcher. Default is Auto.
L2 Stream HW Prefetcher With Force APCB Update enabled, allows you to enable (default) or
disable the L2 Stream HW Prefetcher. Default is Auto.
Platform First Error Handling With Force APCB Update enabled, allows you to enable (default) or
disable platform first error handling, cloak invidual banks, and mask
deferred error interrupts from each bank.
Core Performance Boost With Force APCB Update enabled, allows you to disable core
performance boost. Default is Auto.
Global C-State Control With Force APCB Update enabled, allows you to enable or disable
the IO based C-state generation and DF c-states. Default is Auto.
Appendix F
Advanced Menu
F-3

Oracle Exadata X10M Specifications

General

Brand	Oracle
Model	Exadata X10M
Category	Server
Language	English