Abov MC97F60128 - Page 166

166
MC97F60128
ABOV Semiconductor Co., Ltd.
TnEN
TnCRH
1
ADDRESS:E3H/4079H/4081H/4089H
INITIAL VALUE : 0000_0000B
TnMS[1:0]
TnPOL
A Match
TnCC
TnEN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/32
fx/128
fx/512
fx/8
fx/1
16-bit Counter
TnCNTH/TnCNTL
Clear
Edge
Detector
TnECE
ECn
Comparator
16-bit A Data Register
TnADRH/TnADRL
TnIFR
S/W
Clear
A Match
Buffer Register A
A Match
TnCC
Reload
Pulse
Generator
TnO
R
TnEN
3
TnCK[2:0]
2
TnMIE TnMS1 TnMS0
– – –
TnCC
X 0 0 – – – X
TnCK2
TnCRL
X
ADDRESS:E2H/4078H/4080H/4088H
INITIAL VALUE : 0000_0000B
TnCK1 TnCK0
– –
TnPOL TnECE TnCNTR
X X – –
X X X
TnEN
To interrupt
block
TnMIE
To other block
NOTE)
1. Do not set to “110b” in the TnCK[2:0], when fx is over 10MHz.
Figure 11.15 16-Bit Timer/Counter Mode for Timer 3/4/5/6 (where n = 3,4,5 and 6)
Figure 11.16 16-Bit Timer/Counter 3/4/5/6 Example (where n = 3,4,5 and 6)
TnCNTH/L
Value
Timer n
(TnIFR)
Interrupt
TIME
1
2
3
4
5
6
n-2
n-1
n
Interrupt Period
= P
CP
x (n+1)
0
Count Pulse Period
P
CP
Up-count
Match with TnADRH/L
Occur
Interrupt
Occur
Interrupt
Occur
Interrupt