Abov MC97F60128 User Manual

177
MC97F60128
ABOV Semiconductor Co., Ltd.
11.7.2 8-Bit Timer/Counter 7/8 Mode
The 8-bit timer/counter mode is selected by control register as shown in Figure 11.23.
The two 8-bit timers have each counter and data register. The counter register is increased by internal or external
clock input. Timer 7 can use the input clock with one of 2, 4, 8, 32, 128, 512, 2048 and EC7 prescaler division rates
(T7CK[2:0]). Timer 8 can use the input clock with one of 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192,
16384 and timer 7 clock prescaler division rates (T8CK[3:0]). When the value of T7CNT, T8CNT and T7DR, T8DR are
respectively identical in Timer 7/8, the interrupt Timer 7/8 occurs.
The external clock (EC7) counts up the timer at the rising edge. If the EC7 is selected as a clock source by T7CK[2:0],
EC7 port should be set to the input port by P63IO bit. Timer 8 can’t use the external EC7 clock.
T7EN
T7CR
1
ADDRESS : 4090H (XSFR)
INITIAL VALUE : 0000_0000B
T7IE
T7MS T7CK2 T7CK1 T7CK0 T7CN T7ST
X
0 X X X X X
16BIT
T8CR
0
INITIAL VALUE : 0000_0000B
T8MS T8CN T8ST T8CK3 T8CK2 T8CK1 T8CK0
0 X X
X
X X X
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
T7 CNT (8Bit)
EC7
fx/4
fx/8
fx/32
fx/128
fx/512
fx/2048
3
T7CK[2:0]
T7CN
8- bit Timer 7 Counter
T7 DR (8Bit)
Comparator
T7IFR
T7O
8- bit Timer 7 Data Register
S/W
Clear
Clear
Match
T7ST
T8 CNT (8Bit)
4
T8CK[3:0]
8- bit Timer 8 Counter
T8 DR (8Bit)
Comparator
To interrupt
block
T8O
8- bit Timer 8 Data Register
Clear
Match
T8ST
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/1
fx/2
fx/4
fx/8
fx/16384
T8CN
To interrupt
block
T7IE
ADDRESS : 4092H (XSFR)
NOTE)
1. Do not set to “1111b” in the T8CK[3:0], when two 8-bit timer 7/8 modes.
2. Do not set to “0000b” in the T8CK[3:0], when fx is over 10MHz.
Figure 11.23 8-Bit Timer/Counter Mode for Timer 7/8

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English