Abov MC97F60128 User Manual

161
MC97F60128
ABOV Semiconductor Co., Ltd.
11.5.6 Register Map
Name
Address
Dir
Default
Description
TnCR
D2H/DAH/DDH
R/W
00H
Timer n Control Register
TnCNT
D3H/DBH/DEH
R
00H
Timer n Counter Register
TnDR
D4H/DCH/DFH
R/W
FFH
Timer n Data Register
TnCDR
D4H/DCH/DFH
R
00H
Timer n Capture Data Register
TINTCR
4004H (XSFR)
R/W
00H
Timer Interrupt Control Register
TIFLAG
D5H
R/W
00H
Timer Interrupt Flag Register
Table 11-6 Timer 0/1/2 Register Map
11.5.7 Timer/Counter 0/1/2 Register Description
The timer/counter 0/1/2 register consists of timer 0/1/2 counter register (TnCNT), timer 0/1/2 data register (TnDR),
timer 0/1/2 capture data register (TnCDR), timer 0/1/2 control register (TnCR), timer interrupt control register(TINTCR)
and timer interrupt flag register(TIFLAG).
11.5.8 Register Description for Timer/Counter 0/1/2
TnCNT (Timer n Counter Register) : D3H/DBH/DEH, Where n = 0, 1 and 2
7
6
5
4
3
2
1
0
TnCNT7
TnCNT6
TnCNT5
TnCNT4
TnCNT3
TnCNT2
TnCNT1
TnCNT0
R
R
R
R
R
R
R
R
Initial value : 00H
TnCNT[7:0]
Tn Counter
TnDR (Timer n Data Register : Write only when it is capture mode) : D4H/DCH/DFH, Where n = 0, 1 and 2
7
6
5
4
3
2
1
0
TnDR7
TnDR6
TnDR5
TnDR4
TnDR3
TnDR2
TnDR1
TnDR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FFH
TnDR[7:0]
Tn Data
TnCDR (Timer n Capture Data Register : Capture mode only) : D4H/DCH/DFH, Where n = 0, 1 and 2
7
6
5
4
3
2
1
0
TnCDR7
TnCDR6
TnCDR5
TnCDR4
TnCDR3
TnCDR2
TnCDR1
TnCDR0
R
R
R
R
R
R
R
R
Initial value : 00H
TnCDR[7:0]
Tn Capture Data

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English