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ABOV Semiconductor Co., Ltd.
Figure 11.83 A/D Converter Operation Flow
11.14.5 Register Map
A/D Converter Control High Register
A/D Converter Control Low Register
A/D Converter Data High Register
A/D Converter Data Low Register
Table 11-26 ADC Register Map
11.14.6 ADC Register Description
The ADC register consists of A/D converter data high register (ADCDRH), A/D converter data low register (ADCDRL),
A/D converter control high register (ADCCRH) and A/D converter control low register (ADCCRL).
Select ADC Clock and Data Align Bit.
ADC enable & Select AN Input Channel.
If Conversion is completed, AFLAG is set “1” and ADC
interrupt is occurred.
After Conversion is completed, read ADCDRH and ADCDRL.