Abov MC97F60128 - Register Map; ADC Register Description

290
MC97F60128
ABOV Semiconductor Co., Ltd.
Figure 11.83 A/D Converter Operation Flow
11.14.5 Register Map
Name
Address
Dir
Default
Description
ADCCRH
4003H (XSFR)
R/W
00H
A/D Converter Control High Register
ADCCRL
4002H (XSFR)
R/W
00H
A/D Converter Control Low Register
ADCDRH
4001H (XSFR)
R
xxH
A/D Converter Data High Register
ADCDRL
4000H (XSFR)
R
xxH
A/D Converter Data Low Register
Table 11-26 ADC Register Map
11.14.6 ADC Register Description
The ADC register consists of A/D converter data high register (ADCDRH), A/D converter data low register (ADCDRL),
A/D converter control high register (ADCCRH) and A/D converter control low register (ADCCRL).
SET ADCCRH
SET ADCCRL
AFLAG = 1?
Converting START
READ ADCDRH/L
ADC END
Select ADC Clock and Data Align Bit.
ADC enable & Select AN Input Channel.
Start ADC Conversion.
If Conversion is completed, AFLAG is set “1” and ADC
interrupt is occurred.
After Conversion is completed, read ADCDRH and ADCDRL.
Y
N