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Abov MC97F60128 User Manual

Abov MC97F60128
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MC97F60128
11.8 10-Bit PWM Generator
11.8.1 Overview
The 10-bit PWM generator consists of multiplexer, PWM A data high/low register, PWM B data high/low register, pulse
generator, delay controller, shot stop controller, emergency stop controller and PWM control high/low register
(PWMADRH/L, PWMBDRH/L, PWMDLYDR, NFILDR, PWMCRH/L, PWMCNTH/L). This 10-bit PWM generator can
be used for a IH cooker application.
11.8.2 Function Description
It has three operating modes:
10-bit PWM one-shot mode without auto-enable
10-bit PWM one-shot mode with auto-enable
10-bit PWM repeat mode
The 10-bit PWM generator can select a divided system clock from prescaler output. The clock source is selected by
clock selection logic which is controlled by the clock selection bits (PWMCK[2:0]).
10-bit PWM clock source: f
X
/1, 2, 4, 8, 16, 32, 64 and 128
The 10-bit PWM generator has four external falling edge trigger pins. The one pin is TRIG. The other three pins are
EXTSP0, EXTSP1 and EXTSP2. The falling edge signal of the TRIG pin will clear the 10-bit PWM generator counter.
It will restart one PWM cycle immediately or after some delay time. The delay time can be enabled or disabled by
TRIGRS[1:0] bits. The delay time is programmable with the 10-bit PWM generator delay data register (PWMDLYDR).
The EXTSP0, EXTSP1 and EXTSP2 pins can be selected for shot stop or emergency stop signal by ESPnS[1:0] bits.
Where n = 0, 1 and 2. The falling edge signal of the pin which is selected for the shot stop holds the PWMOUT pin to
low level by PWMPOL bit set to 0b or to high level by PWMPOL bit set to 1b for the current PWM cycle. After that,
The 10-bit PWM generator will restart with the value of the PWM B data register (PWMBDRH/L) and the value of the
PWM A data register (PWMADRH/L) is changed with the value of the PWM B data register. The emergency stop
controller STOP the 10-bit PWM generator by the falling egde signal of the selected pin. The 10-bit PWM generator
has a noise filter controller to remove a mis-trigger signal of the TRIG pin. The noise filter controller donst work with
the noise filter data register (NFILDR) set to 00H. If the noise filter data register isnt 00H, the noise filter can
eliminate an invalid signal of the TRIG pin and the filtering time is programmable by the register.
PWMEN
P2FSRH[1:0]
PWMMD[1:0]
PWMCK[2:0]
10-bit PWM generator
1
10
00
XXX
One-shot mode without auto-enable
1
10
01
XXX
One-shot mode with auto-enable
1
10
1x
XXX
Repeat mode
Table 11-13 10-bit PWM generator Operating Modes

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Abov MC97F60128 Specifications

General IconGeneral
BrandAbov
ModelMC97F60128
CategoryMicrocontrollers
LanguageEnglish

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