Abov MC97F60128 User Manual

298
MC97F60128
ABOV Semiconductor Co., Ltd.
11.15.7 Block Diagram
DACDRH/DACDRL
.15 .14 .13 .12 .11 .10 .9 .8
.7 .6 .5 .4 .3 .2 .1 .0
DACDRH
DACDRL
FADPCM Decoder match
Timer 0 match
Timer 1 match
16-bits
D/AC Buffer
High
Low
12-bits D/A Converter
[Upper 12-bits]
DAC Pin
DACEN
VDD1
VSS
DACBC
Clear
DODRH/DODRL
(16-bits, Read only)
FADPCM Decoder Result Signal
FADFEN
Result Output Data
of FADPCM Decoder
{
Gain
Controller
PGSR
ADATID
Enable/Disable
Controller
DACIFR
M
U
X
2
DACRLDS[1:0]
.15 .14 .13 .12 .11 .10 .9 .8
.7 .6 .5 .4 .3 .2 .1 .0
High
S/W
Clear
To interrupt
block
DACIE
4
DAC Offset Controller
OFSEN
OFSDIR
OFS[3:0]
4
SPI2DR (8-BIT)
SPI3DR (8-BIT)
D/AC Interface
Controller
DACIFEN MDSEL
SPISEL
12
CMD[3:0]
4
CSB Signal
LDACB Signal
NOTE)
1. The DODRH/L register is a binary format with 16-bits length.
2. The gain controller converts data like the below order.
- Get the DACDR[15:0] value
- Adjust the data by selection gain
- Write the data to the D/AC buffer
3. The D/AC interface block doesn’t work when DACRLDS bits of the DACCR register are set
to “00b”
Figure 11.87 12-Bit D/AC Block Diagram
AVREF
Analog
Power
22uF
AVSS
Analog
Ground
Figure 11.88 Analog Power (AVREF) Pin with Capacitor

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English