Abov MC97F60128 User Manual

222
MC97F60128
ABOV Semiconductor Co., Ltd.
11.10 SPI 2
11.10.1 Overview
There is serial peripheral interface with FIFO (SPI 2) one channel in MC97F60128. The SPI 2 allows synchronous
serial data transfer between the external serial devices. It can do Full-duplex communication by 4-wire (MOSI2,
MISO2, SCK2, SS2), support master/slave mode, can select serial clock (SCK2) polarity, phase and whether LSB first
data transfer or MSB first data transfer.
11.10.2 Block Diagram
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/4
fx/8
fx/32
fx/64
fx/128
fx/16
fx/2
SCK
Control
SPI2MS
SCK2
3
SPI2CR[2:0]
M
U
X
SPI2MS
CPHA2
Edge
Detector
CPOL2
SPI
Control Circuit
SPI2EN
INT_ACK
Clear
To interrupt
block
SPI2IFR
8-bit Rx Shift
Register
M
U
X
SPI2MS
8-bit Tx Shift
Register
FLSB2
8
D
E
P
MISO2
MOSI2
FXCH2
SS2
SS
Control
SPI2MSSSEN2
Internal Bus Line
Rx FIFO Controller
(8-Bytes FIFO)
SPI2DR
(8-bit)
Tx FIFO Controller
(8-Bytes FIFO)
Write Read
MSTR2
FIFOC
DOR2
WCOL2
TXFFF
RXFEF
INT_ACK
Clear
To interrupt
block
TXFEIFR
INT_ACK
Clear
To interrupt
block
RXFFIFR
8
Figure 11.50 SPI 2 Block Diagram

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English