Abov MC97F60128 - Block Diagram

171
MC97F60128
ABOV Semiconductor Co., Ltd.
11.6.5 Block Diagram
TnMS[1:0]
TnPOL
Reload
A Match
TnCC
TnEN
Comparator
16- bit Counter
TnCNTH/ TnCNTL
16- bit B Data Register
TnBDRH/ TnBDRL
Clear
B Match
Buffer Register B
Comparator
16- bit A Data Register
TnADRH/ TnADRL
TnIFR
S/W
Clear
A Match
Buffer Register A
Reload
Pulse
Generator
TnO/
PWMnO
R
EINT1n
TnCNTR
TnEN
Clear
POL1 n of EIPOL2H/L
FLAG1n
( EIFLAG2.n)
S/W
Clear
To interrupt
block
2
2
TnMS[1:0]
2
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/4
fx/8
fx/128
fx/512
fx/32
fx/2
Edge
Detector
TnECE
ECn
fx/1
To other block
TnCK[2:0]
3
To interrupt
block
TnMIE
A Match
TnCC
TnEN
A Match
TnCC
TnEN
NOTE)
1. Do not set to “110b” in the TnCK[2:0], when fx is over 10MHz.
Figure 11.22 16-Bit Timer 3/4/5/6 Block Diagram (where n = 3,4,5 and 6)