294
ABOV Semiconductor Co., Ltd.
11.15 12-Bit D/A Converter
11.15.1 Overview
The digital-to-analog converter (D/A) uses successive approximation logic to convert 12-bit digital value to an analog
output level. The D/A module has six registers which are the D/A converter control register (DACCR), D/A converter
data high register (DACDRH), D/A converter data low register (DACDRL), D/A converter buffer high register
(DACBRH), D/A converter buffer low register (DACBRL) and programmable gain selection register (PGSR).
11.15.2 Function Description
The D/A converter has R-2R structure and the data regiser is a binary format. It is possible to update the D/A converter
data register as the result output data (DODRH/L register) of FADPCM decoder every the FADPCM decoder result
signal by FADFEN bit set to “1b”. The 16-bit digital value of the D/AC data register goes into D/AC buffer register
through the programmable gain controller every a reload signal. The reload signal is one of the “Always”, “FADPCM
decoder match signal”, “Timer 0 match signal” and “Timer 1 match signal”. The signal is selected by the DACRLDS[1:0]
bits. The programmable gain controller has eleven step (-30dB, -24dB, -18dB, -12dB, -6dB, 0dB, +6dB, +12dB, +18dB,
+24dB and +30dB) and the gain is selected by the programmable gain register (PGSR). The value of the D/A
converter data register can be automatically incremented from the current data value to “800xH” when the D/A
converter is enabled by DACEN bit set to “1b” and vice vesa. At that time, the D/A converter interrupt flag bit (DACIFR)
is set to “1b”. The auto-increment/decrement structure for D/A converter data is useful to remove a pop noise when a
speaker is turn on/off. Two kinds External D/AC Converter is be accessed.
11.15.3 D/A Converter Data and Buffer Registers
The D/A converter data and buffer registers are 16-bits, repectively. But only the upper 12-bits of the D/A converter
buffer register specifies to generate DAC output signal. The reset value of the data and buffer is “0000H”. The D/A
converter output value, V
DAC
, is calculated by the following formula.
V
DAC
= VDD X (n ÷ 4096), (n = 0, 1, 2,,,,, 4095. That is DACBR[15:4] value)
To Next Page
Loading...
Need help?
General
