Abov MC97F60128 - Spi 3; Overview; Block Diagram

230
MC97F60128
ABOV Semiconductor Co., Ltd.
11.11 SPI 3
11.11.1 Overview
There is serial peripheral interface (SPI 3) one channel in MC97F60128. The SPI 3 allows synchronous serial data
transfer between the external serial devices. It can do Full-duplex communication by 4-wire (MOSI3, MISO3, SCK3,
SS3), support master/slave mode, can select serial clock (SCK3) polarity, phase and whether LSB first data transfer or
MSB first data transfer.
11.11.2 Block Diagram
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/4
fx/8
fx/32
fx/64
fx/128
fx/16
fx/2
SCK
Control
SPI3MS
SCK3
3
SPI3CR[2:0]
M
U
X
SPI3MS
CPHA3
Edge
Detector
CPOL3
SPI
Control Circuit
WCOL3
SPI3EN
INT_ACK
Clear
To interrupt
block
SPI3IFR
8-bit Shift
Register
M
U
X
SPI3MS
SPI3DR
(8-bit)
FLSB3
8
D
E
P
MISO3
MOSI3
FXCH3
SS3
SS
Control
SPI3MSSPI3SSEN
Internal Bus Line
Figure 11.53 SPI 3 Block Diagram