Abov MC97F60128 - 10-Bit Timer 8 PWM Mode

182
MC97F60128
ABOV Semiconductor Co., Ltd.
11.7.6 10-Bit Timer 8 PWM Mode
The timer 8 has a high speed PWM (Pulse Width Modulation) function. In PWM mode, the 6-channel pins output up to
10-bit resolution PWM output. This pin should be configured as a PWM output by set PWM8E to ‘1’. When the value of
2bit +T8CNT and T8PPRH/L are identical in timer 8, a period match signal is generated and the interrupt of timer 8
occurs. In 10-bit PWM mode, A, B, C, bottom(underflow) match signal are generated when the 10-bit counter value
are identical to the value of T8xDRH/L. The period of the PWM output is determined by the T8PPRH/L (PWM period
register), T8xDRH/L (each channel PWM duty register).
PWM Period = [T8PPRH/T8PPRL ] X Source Clock
PWM Duty(A-ch) = [ T8ADRH/T8ADRL ] X Source Clock
Resolution
Frequency
T8CK[3:0]=0001 (250ns)
T8CK[3:0]=0010 (500ns)
T8CK[3:0]=0100 (2us)
10 Bit
3.9kHz
1.95kHz
0.49kHz
9 Bit
7.8kHz
3.9kHz
0.98kHz
8 Bit
15.6kHz
7.8kHz
1.95kHz
7 Bit
31.2kHz
15.6kHz
3.91kHz
Table 11-10 PWM Frequency vs. Resolution at 8 MHz
The POLxA bit of T8PCR3 register decides the polarity of duty cycle. If the duty value is set same to the period value,
the PWM output is determined by the bit POLxA (1: High, 0: Low). And if the duty value is set to "00H", the PWM
output is determined by the bit POLxA (1: Low, 0: High).
PHLT:PxxOE
POLxA
POLBO
POLxB
PWM8xA Pin Output
PWM8xB Pin Output
0x, x0, 00
0
0
0
Low-level
Low-level
1
Low-level
High-level
1
x
Low-level
Low-level
1
0
0
High-level
High-level
1
High-level
Low-level
1
x
High-level
High-level
11
0
x
0
Positive-phase
Positive-Phase
1
Positive-phase
Negative-Phase
1
x
0
Negative-Phase
Negative-Phase
1
Negative-Phase
Positive-phase
Table 11-11 PWM Channel Polarity