FORCA
T8PCR2
0
ADDRESS:4094H (XSFR)
INITIAL VALUE : 0000_0000B
–
PAAOE PABOE PBAOE PBBOE PCAOE PCBOE
–
X X X X X X
HZCLR
T8PCR3
X
ADDRESS:4095H (XSFR)
INITIAL VALUE : 0000_0000B
POLBO POLAA POLAB POLBA POLBB POLCA POLCB
X X X
X
X X X
16BIT
T8CR
0
ADDRESS:4092H (XSFR)
INITIAL VALUE : 0000_0000B
T8MS T8CN T8ST T8CK3 T8CK2 T8CK1 T8CK0
X
X X X X X X
PWM8E
T8PCR1
1
ADDRESS:4093H (XSFR)
INITIAL VALUE : 0000_0000B
ESYNC BMOD PHLT UPDT UALL NOPS1 NOPS0
X X X
X
X X X
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/16
fx/32
fx/64
fx/8
fx/1
Comparator
10-bit Counter
2Bit + T8CNT
10-bit A Data Register
T8ADRH/T8ADRL
Control
Up/Down
Comparator
T8PPRH/T8PPRL (10Bit)
Period Match
PWM
Output
Control
A-ch
PWM8AA
T8CN
4
T8CK[3:0]
T7 Clock Source
fx/128
fx/256
fx/1024
fx/2048
fx/4096
fx/512
fx/8192
fx/16384
Timer 8 PWM Period Register
T8ST
PWM
Delay
Control
A-ch
PWM8AB
Comparator
10-bit B Data Register
T8BDRH/T8BDRL
PWM
Output
Control
B-ch
PWM8BA
PWM
Delay
Control
B-ch
PWM8BB
Comparator
10-bit C Data Register
T8CDRH/T8CDRL
PWM
Output
Control
C-ch
PWM8CA
PWM
Delay
Control
C-ch
PWM8CB
A Match
B Match
C Match
Interrupt
Generator
A Match
B Match
C Match
Bottom (Underflow)
To interrupt
block
NOTE)
1. Do not set to “1111b” in the T8CK[3:0], when two 8-bit timer 7/8 modes.
2. Do not set to “0000b” in the T8CK[3:0], when fx is over 10MHz.