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Agilent Technologies 93000 SOC Series - Page 206

Agilent Technologies 93000 SOC Series
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Lesson 3 Setting up the Digitizers in the Digital Clock Domain
206
Final Digital Clock Domain Setup for the WDB (3)
The calculation of the Fs value is performed according to the
selected rule.
The following example of a desired Fs of 36MHz for the WDA
shows how the required divider N is calculated for the Auto (Fs)
rule
The range of valid N values depends on the physical
implementation of the divider of the analog module, and on the
valid Fs range of the module. This is also explained below.

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