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Atmel AVR XMEGA AU series - Page 504

Atmel AVR XMEGA AU series
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8331B–AVR–03/12
Atmel AVR XMEGA AU
13.2 Overview ........................................................................................................143
13.3 I/O Pin Use and Configuration .......................................................................144
13.4 Reading the Pin Value ...................................................................................147
13.5 Input Sense Configuration .............................................................................148
13.6 Port Interrupt ..................................................................................................149
13.7 Port Event ......................................................................................................150
13.8 Alternate Port Functions ................................................................................150
13.9 Slew Rate Control ..........................................................................................151
13.10 Clock and Event Output .................................................................................151
13.11 Multi-pin configuration ...................................................................................152
13.12 Virtual Ports ...................................................................................................152
13.13 Register Descriptions – Ports ........................................................................153
13.14 Register Descriptions – Port Configuration ...................................................159
13.15 Register Descriptions – Virtual Port ...............................................................164
13.16 Register Summary – Ports ............................................................................166
13.17 Register Summary – Port Configuration ........................................................166
13.18 Register Summary – Virtual Ports .................................................................166
13.19 Interrupt Vector Summary – Ports .................................................................167
14 TC0/1 – 16-bit Timer/Counter Type 0 and 1 ....................................... 168
14.1 Features ........................................................................................................168
14.2 Overview ........................................................................................................168
14.3 Block Diagram ...............................................................................................170
14.4 Clock and Event Sources ..............................................................................171
14.5 Double Buffering ............................................................................................171
14.6 Counter Operation .........................................................................................172
14.7 Capture Channel ...........................................................................................175
14.8 Compare Channel .........................................................................................177
14.9 Interrupts and events .....................................................................................181
14.10 DMA Support .................................................................................................181
14.11 Timer/Counter Commands ............................................................................181
14.12 Register Description ......................................................................................182
14.13 Register Summary .........................................................................................192
14.14 Interrupt Vector Summary .............................................................................192
15 TC2 – 16-bit Timer/Counter Type 2 ..................................................... 193
15.1 Features ........................................................................................................193

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