Cypress PSoC 4000 Series - General-Purpose Resources: Idacs and Comparator; Register List

PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D 135
CapSense
17.6 General-Purpose Resources: IDACs and Comparator
If the CapSense block is not used for touch sensing, the sense comparator and the two IDACs can be used as general-pur-
pose analog blocks.
You can use AMUXBUS A to connect any CSD-supported GPIO to the non-inverting input of the sense comparator. The
inverting input is connected to the 1.2-V V
REF
(see Figure 17-3). The AMUXBUS A can also be used as an analog multiplexer
at the comparator input. The SENSE_COMP_EN, SENSE_COMP_BW, and ENABLE bits in the CSD_CONFIG register can
be used to control the sense comparator, as explained in Sigma Delta Converter on page 131.
If AMUXBUS is required for other uses, the SENSE_INSEL bit in the CSD_CONFIG register can be used to connect the non-
inverting input of the sense comparator to the fixed C
MOD
pin, as explained in CMOD Precharge on page 134. The output of
the comparator can connect to multiple GPIOs, see the I/O System chapter on page 45 for more details.
The 8-bit IDAC can operate in either 0 to 306 µA (1.2 µA/bit) or 0 to 612 µA (2.4 µA/bit) ranges. The 7-bit IDAC supports 0 to
152.4 µA (1.2 µA/bit) and 0 to 304.8 µA (2.4 µA/bit) ranges.
Both the 8-bit and 7-bit IDACs can connect to GPIOs using AMUXBUS A and AMUXBUS B. It is also possible to connect both
IDACs to a single AMUXBUS. The IDACS can operate in three different modes: CSD-only mode, General-purpose (GP)
mode, and CSD and GP mode. Table 17-1 describes how IDAC1 and IDAC2 are connected to AMUXBUS A and AMUXBUS
B in each of these modes.
See the CSD_IDAC register in the
PSoC 4000 Family: PSoC 4 Registers TRM for details. The CSD_CONFIG register can be
used to enable the IDACs and set the polarity, as mentioned in Sigma Delta Converter on page 131. See the I/O
System chapter on page 45 for details on how to connect GPIOs to AMUXBUS A and B.
17.7 Register List
Table 17-1. IDAC Modes
Mode AMUXBUS A AMUXBUS B
CSD only Both IDACs sink/source current at 1.2 V No IDACs connected
General-purpose mode 8-bit IDAC sink/source current 7-bit IDAC sink/source current
CSD and GP mode 8-bit IDAC sink/source current at 1.2 V 7-bit IDAC sink/source current
Table 17-2. CapSense Register List
Register Name Description
CSD_CONFIG This register is used to configure and control the CSD block and its resources.
CSD_IDAC This register is used to control the IDAC current settings.
CSD_COUNTER This register is used to initiate a sampling of the selected capacitive sensor and read the result of conversion.
CSD_STATUS This register allows the observation of key signals in the CSD block.
CSD_INTR This is the CSD interrupt request register.