Cypress PSoC 4000 Series - Multi-Master Mode Transfer Example

98 PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D
Inter-Integrated Circuit (I2C)
15.2.12 Multi-Master Mode Transfer Example
In multi-master mode, data can be transferred with the slave mode enabled or not enabled.
15.2.12.1 Multi-Master - Slave Not Enabled
Figure 15-11. Multi-Master, Slave Not Enabled Flow Chart
Begin
Disable Fixed
Function I2C block
Select Master
mode
Enable
TX FIFO
Enable Fixed
Function I2C block
Send START
signal
Transmission
of one byte
slave address
complete?
No
(stretch)
E
Lost arbitration?
Error
Yes
Begin
Bus busy?
No
Bus busy?
Yes
No
Yes
No
Continue with data transfer as
in single master
E
Report and
handle error
Yes
End