Cypress PSoC 4000 Series - Power Mode Summary

PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D 71
Power Modes
11.4 Power Mode Summary
Table 11-3 illustrates the peripherals available in each low-power mode; Table 11-3 illustrates the wakeup sources available in
each power mode.
Table 11-2. Available Peripherals
Peripheral Active Sleep Deep-Sleep
CPU Available
Retention
a
a. The configuration and state of the peripheral is retained. Peripheral continues its operation when the device enters Active mode.
Retention
SRAM Available Retention Retention
High-speed peripherals Available Available Retention
Low-speed peripherals Available Available Available (optional)
Internal main oscillator (IMO) Available Available Not Available
Internal low-speed oscillator (ILO, kHz) Available Available Available (optional)
Asynchronous peripherals Available Available Available
Power-on-reset, Brownout detection Available Available Available
Regular analog peripherals Available Available Not Available
GPIO output state Available Available Available
Table 11-3. Wakeup Sources
Power Mode Wakeup Source Wakeup Action
Sleep
Any interrupt source Interrupt
Any reset source Reset
Deep-Sleep
GPIO interrupt Interrupt
I2C address match Interrupt
Watchdog timer Interrupt/Reset
XRES (external reset pin)
a
, Brownout
a. XRES triggers a full system restart. All the states including frozen GPIOs are lost. In this case, the cause of wakeup is not readable after the device restarts.
Reset
Deep-Sleep GPIO interrupt Interrupt
I2C address match Interrupt
Watchdog timer Interrupt/Reset