Cypress PSoC 4000 Series - 19.5.3 Load Flash Bytes

PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D 151
Nonvolatile Memory Programming
19.5.3 Load Flash Bytes
This function loads the page latch buffer with data to be programmed into a row of flash. The load size can range from 1-byte
to the maximum number of bytes in a flash row, which is 64 bytes. Data is loaded into the page latch buffer starting at the
location specified by the “Byte Addr” input parameter. Data loaded into the page latch buffer remains until a program opera-
tion is performed, which clears the page latch contents. The parameters for this function, including the data to be loaded into
the page latch, are written to the SRAM; the starting address of the SRAM data is written to the CPUSS_SYSARG register.
Note that the starting parameter address should be a word-aligned address.
Parameters
Return
Address Value to be Written Description
SRAM Address - 32’hYY (32-bit wide, word-aligned SRAM address)
Bits [7:0] 0xB6 Key1
Bits [15:8] 0xD7 Key2
Bits [23:16] Byte Addr
Start address of page latch buffer to write data
0x00 – Byte 0 of latch buffer
0x3F – Byte 63 of latch buffer
Bits [31:24] Flash Macro Select
0x00 – Flash Macro 0
0x01 – Flash Macro 1
(Refer to the Cortex-M0 CPU chapter on page 25 for the
number of flash macros in the device)
SRAM Address- 32’hYY + 0x04
Bits [7:0] Load Size
Number of bytes to be written to the page latch buffer.
0x00 – 1 byte
0x3F – 64 bytes
Bits [15:8] 0xXX Don’t care parameter
Bits [23:16] 0xXX Don’t care parameter
Bits [31:24] 0xXX Don’t care parameter
SRAM Address- From (32’hYY + 0x08) to (32’hYY + 0x08 + Load Size)
Byte 0 Data Byte [0] First data byte to be loaded
.. .
.. .
Byte (Load size –1) Data Byte [Load size –1] Last data byte to be loaded
CPUSS_SYSARG register
Bits [31:0] 32’hYY
32-bit word-aligned address of the SRAM that stores the first
function parameter (key1)
CPUSS_SYSREQ register
Bits [15:0] 0x0004 Load Flash Bytes opcode
Bits [31:16] 0x8000 Set SYSCALL_REQ bit
Address Return Value Description
CPUSS_SYSARG register
Bits [31:28] 0xA Success status code
Bits [27:0] 0xXXXXXXX Not used (don’t care)