EasyManua.ls Logo

Cypress PSoC 4000 Series - I2 C Registers

Cypress PSoC 4000 Series
178 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D 87
Inter-Integrated Circuit (I2C)
15.2.4 I2C Registers
The I
2
C interface is controlled by reading and writing a set of configuration, control, and status registers, as listed in
Table 15-4.
Note Detailed descriptions of the I
2
C register bits are available in the PSoC 4000 Family: PSoC 4 Registers TRM.
Table 15-4. I2C Registers
Register Function
SCB_CTRL
Enables the I2C block and selects the type of serial interface (I2C). Also used to select internally and exter-
nally clocked operation and EZ and non-EZ modes of operation.
SCB_I2C_CTRL Selects the mode (master, slave) and sends an ACK or NACK signal based on receiver FIFO status.
SCB_I2C_STATUS
Indicates bus busy status detection, read/write transfer status of the slave/master, and stores the EZ slave
address.
SCB_I2C_M_CMD Enables the master to generate START, STOP, and ACK/NACK signals.
SCB_I2C_S_CMD Enables the slave to generate ACK/NACK signals.
SCB_STATUS
Indicates whether the externally clocked logic is using the EZ memory. This bit can be used by software to
determine whether it is safe to issue a software access to the EZ memory.
SCB_I2C_CFG Configures filters, which remove glitches from the SDA and SCL lines.
SCB_TX_CTRL Specifies the data frame width; also used to specify whether MSB or LSB is the first bit in transmission.
SCB_TX_FIFO_CTRL
Specifies the trigger level, clearing of the transmitter FIFO and shift registers, and FREEZE operation of the
transmitter FIFO.
SCB_TX_FIFO_STATUS
Indicates the number of bytes stored in the transmitter FIFO, the location from which a data frame is read by
the hardware (read pointer), the location from which a new data frame is written (write pointer), and decides
if the transmitter FIFO holds the valid data.
SCB_TX_FIFO_WR Holds the data frame written into the transmitter FIFO. Behavior is similar to that of a PUSH operation.
SCB_RX_CTRL
Performs the same function as that of the SCB_TX_CTRL register, but for the receiver. Also decides
whether a median filter is to be used on the input interface lines.
SCB_RX_FIFO_CTRL Performs the same function as that of the SCB_TX_FIFO_CTRL register, but for the receiver.
SCB_RX_FIFO_STATUS Performs the same function as that of the SCB_TX_FIFO_STATUS register, but for the receiver.
SCB_RX_FIFO_RD
Holds the data read from the receiver FIFO. Reading a data frame removes the data frame from the FIFO;
behavior is similar to that of a POP operation. This register has a side effect when read by software: a data
frame is removed from the FIFO.
SCB_RX_FIFO_RD_SILENT
Holds the data read from the receiver FIFO. Reading a data frame does not remove the data frame from the
FIFO; behavior is similar to that of a PEEK operation.
SCB_RX_MATCH Stores slave device address and is also used as slave device address MASK.
SCB_EZ_DATA Holds the data in an EZ memory location.

Table of Contents

Related product manuals