154 PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D
Nonvolatile Memory Programming
performing a checksum only on one row of flash, the flash row number is passed as a parameter. Bytes 2 and 3 of the param-
eters select whether the checksum is performed on the whole flash memory or a row of user code flash.
Parameters
Return
19.5.8 Write Protection
This function programs both the flash row-level protection settings and the device protection settings in the supervisory flash
row. The flash row-level protection settings are programmed separately for each flash macro in the device. Each row has a
single protection bit. The total number of protection bytes is the number of flash rows divided by eight. The chip-level protec-
tion settings (1-byte) are stored in flash macro zero in the last byte location in row zero of the supervisory flash. The size of
the supervisory flash row is the same as the user code flash row size.
Usage Requirements: Call the Configure Clock API before calling this function. The Configure Clock API ensures that the
charge pump clock (clk_pump) and the HF clock (clk_hf) are set to IMO at 48 MHz. The Load Flash Bytes function is used to
load the flash protection bytes of a flash macro into the page latch buffer corresponding to the macro. The starting address
parameter for the load function should be zero. The flash macro number should be one that needs to be programmed; the
number of bytes to load is the number of flash protection bytes in that macro.
Then, the Write Protection function is called, which programs the flash protection bytes from the page latch to be the corre-
sponding flash macro’s supervisory row. In flash macro zero, which also stores the device protection settings, the device level
protection setting is passed as a parameter in the CPUSS_SYSARG register.
Address Value to be Written Description
CPUSS_SYSARG register
Bits [7:0] 0xB6 Key1
Bits [15:8] 0xDE Key2
Bits [31:16] Row ID
Selects the flash row number on which the checksum operation is done
Row number – 16 bit flash row number
or
0x8000 – Checksum is performed on entire flash memory
CPUSS_SYSREQ register
Bits [15:0] 0x000B Checksum opcode
Bits [31:16] 0x8000 Set SYSCALL_REQ bit
Address Return Value Description
CPUSS_SYSARG register
Bits [31:28] 0xA Success status code
Bits [27:24] 0xX Not used (don’t care)
Bits [23:0] Checksum 24-bit checksum value of the selected flash region
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