Cypress PSoC 4000 Series - Page 93

PSoC 4000 Family: PSoC 4 Architecture TRM, Document No. 001-89309 Rev. *D 93
Inter-Integrated Circuit (I2C)
15.2.9.2 Master Receive
Figure 15-6. Single Master Mode Read Operation Flow Chart
Begin
Disable Fixed
Function I2C block
Select Master
mode
Enable
RX FIFO
Enable Fixed
Function I2C block
Transmission
of one byte
slave address
complete?
No
(stretch)
E
Address ACK’ed or
NACK’ed?
Error
Yes
NACK
STOP/
RESTART
Set Fixed Function
I2C block
to receive mode
Receiving
one byte data
complete?
RX FIFO
full?
Yes
Yes
E
Data transfer
complete?
No
Send STOP
signal
Yes
Send START
signal
ACK
E
Error
STOP
E
Report and
handle error
Send ACK
Send NACK
No
No
RESTART
End