DMIBAR Registers—Direct Media Interface (DMI) RCRB
R
100 Intel
®
82925X/82925XE MCH Datasheet
7.1 Direct Media Interface (DMI) RCRB Register Details
7.1.1 DMIVCECH—DMI Virtual Channel Enhanced Capability
Header
MMIO Range: DMIBAR
Address Offset: 000h
Default Value: 04010002h
Access: RO
Size: 32 bits
This register indicates DMI Virtual Channel capabilities.
Bit Access &
Default
Description
31:20 RO
040h
Pointer to Next Capability: This field indicates the next item in the list.
19:16 RO
1h
Capability Version: This field indicates support as a version 1 capability
structure.
15:0 RO
0002h
Capability ID: This field indicates this is the Virtual Channel capability item.
7.1.2 DMIPVCCAP1—DMI Port VC Capability Register 1
MMIO Range: DMIBAR
Address Offset: 004h
Default Value: 00000001h
Access: R/WO, RO
Size: 32 bits
This register describes the configuration of Virtual Channels associated with this port.
Bit Access &
Default
Description
31:12 Reserved
11:10 RO
00b
Port Arbitration Table Entry Size (PATS): This field indicates the size of the
port arbitration table is 4 bits (to allow up to 8 ports).
9:8 RO
00b
Reference Clock (RC)
Fixed at 100 ns.
7 Reserved
6:4 RO
000b
Low Priority Extended VC Count (LPEVC): This field indicates that there are
no additional VCs of low priority with extended capabilities.
3 Reserved
2:0 R/WO
001b
Extended VC Count: This field indicates that there is one additional VC (VC1)
that exists with extended capabilities.