Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU User Manual

Host-PCI Express* Graphics Bridge Registers (D1:F0)
R
Intel
®
82925X/82925XE MCH Datasheet 133
8.1.29 MA—Message Address (D1:F0)
PCI Device: 1
Address Offset: 94h
Default Value: 00000000h
Access: RO, R/W
Size: 32 bits
Bit Access &
Default
Description
31:2 R/W
00000000 h
Message Address: This field is used by system software to assign an MSI
address to the device.
The device handles an MSI by writing the padded contents of the MD register to
this address.
1:0 RO
00b
Force DWord Align: Hardwired to 0 so that addresses assigned by system
software are always aligned on a DWord address boundary.
8.1.30 MD—Message Data (D1:F0)
PCI Device: 1
Address Offset: 98h
Default Value: 0000h
Access: R/W
Size: 16 bits
Bit Access &
Default
Description
15:0 R/W
0000h
Message Data: This field provides a base message data pattern assigned by
system software and used to handle an MSI from the device.
When the device must generate an interrupt request, it writes a 32-bit value to
the memory address specified in the MA register. The upper 16 bits are always
set to 0. This register supplies the lower 16 bits.

Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Specifications

General

Brand	Intel
Model	925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU
Category	Computer Hardware
Language	English