Host-PCI Express* Graphics Bridge Registers (D1:F0)
R
142 Intel
®
82925X/82925XE MCH Datasheet
8.1.40 SLOTCTL—Slot Control (D1:F0)
PCI Device: 1
Address Offset: B8h
Default Value: 01C0h
Access: R/W
Size: 16 bits
PCI Express slot related registers allow for the support of Hot-Plug.
Bit Access &
Default
Description
15:10 Reserved
9:8 R/W
01b
Power Indicator Control: Reads to this register return the current state of the
Power Indicator.
Writes to this register set the Power Indicator and cause the Port to send the
appropriate POWER_INDICATOR_* messages.
00 = Reserved
01 = On
10 = Blink
11 = Off
7:6 R/W
11b
Attention Indicator Control: Reads to this register return the current state of
the Attention Indicator.
Writes to this register set the Attention Indicator and cause the Port to send the
appropriate ATTENTION_INDICATOR_* messages.
00 = Reserved
01 = On
10 = Blink
11 = Off
5 R/W
0b
Hot plug Interrupt Enable:
0 = Disable.
1 = Enables generation of hot plug interrupt on enabled hot plug events.
4 R/W
0b
Command Completed Interrupt Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt when the Hot plug controller
completes a command.
3 R/W
0b
Presence Detect Changed Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt or wake message on a
presence detect changed event.
2:1 Reserved
0 R/W
0b
Attention Button Pressed Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt or wake message on an
attention button pressed event.