Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU

Signal Description
R
34 Intel
®
82925X/82925XE MCH Datasheet
Table 2-5. Clocking Reset and S3 States
Interface Signal Name I/O
State During
RSTIN#
Assertion
State After
RSTIN# De-
assertion
S3
Pull-up/
Pull-down
HCLKN I IN IN IN
HCLKP I IN IN IN
GCLKN I IN IN IN
GCLKP I IN IN IN
DREFCLKN I IN IN IN
Clocks
DREFCLKP I IN IN IN
Table 2-6. Miscellaneous Reset and S3 States
Interface Signal Name I/O
State During
RSTIN#
Assertion
State After RSTIN#
De-assertion
S3
Pull-up/
Pull-down
RSTIN# I IN IN IN
PWROK I HV HV HV
EXTTS# I PU PU PU
BSEL[2:0] I TRI TRI TRI
MTYPE I TERM HV TERM HV TERM HV
EXP_SLR I TERM HV TERM HV TERM HV
Misc.
ICH_SYNC# O PU PU PU
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