Functional Description
R
Intel
®
82925X/82925XE MCH Datasheet 179
Table 10-4. DRAM Address Translation (Single Channel/Dual Asymmetric Mode)
Tech
Banks
Page Size
Rank Size
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
256 Mb x16 4i 4 KB 128 MB r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 r12 b0 b1 c8 c7 c6 c5 c4 c3 c2 c1 c0
256 Mb x8 4i 8 KB 256 MB r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
512 Mb x16 4i 8 KB 256 MB r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
512 Mb x8 4i 16 KB 512 MB r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 c11 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
512 Mb x16 4i 8 KB 256 MB r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
512 Mb x8 4i 8 KB 512 MB r13 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
1 Gb x16 4i 8 KB 512 MB r13 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
1 Gb x8 4i 16 KB 1 GB r13 r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 c11 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
1 Gb x16 8i 8 KB 512 MB r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 b2 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
1 Gb x8 8i 8 KB 1 GB r13 r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 b2 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
NOTES:
1. b – ‘bank’ select bit
2. c – ‘column’ address bit
3. r – ‘row’ address bit