Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU User Manual

Host-PCI Express* Graphics Bridge Registers (D1:F0)
R
Intel
®
82925X/82925XE MCH Datasheet 125
8.1.20 INTRLINE1—Interrupt Line (D1:F0)
PCI Device: 1
Address Offset: 3Ch
Default Value: 00h
Access: R/W
Size: 8 bits
This register contains interrupt line routing information. The device itself does not use this value;
rather device drivers and operating systems use it to determine priority and vector information.
Bit Access &
Default
Description
7:0 R/W
00h
Interrupt Connection: This field is used to communicate interrupt line routing
information. POST software writes the routing information into this register as it
initializes and configures the system. The value in this register indicates which
input of the system interrupt controller this device’s interrupt pin is connected to.
8.1.21 INTRPIN1—Interrupt Pin (D1:F0)
PCI Device: 1
Address Offset: 3Dh
Default Value: 00h
Access: RO
Size: 8 bits
This register specifies which interrupt pin this device uses.
Bit Access &
Default
Description
7:0 RO
01h
Interrupt Pin: As a single function device, the PCI Express* device specifies
INTA as its interrupt pin.
01h = INTA

Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Specifications

General

Brand	Intel
Model	925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU
Category	Computer Hardware
Language	English