Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU User Manual

MCHBAR Registers
R
Intel
®
82925X/82925XE MCH Datasheet 91
5.1.16 C1DRA2—Channel B DRAM Rank 2,3 Attribute
MMIO Range: MCHBAR
Address Offset: 189h
Default Value: 00h
Access: R/W
Size: 8 bits
The operation of this register is detailed in the description for register C0DRA0.
5.1.17 C1DCLKDIS—Channel B DRAM Clock Disable
MMIO Range: MCHBAR
Address Offset: 18Ch
Default Value: 00h
Access: R/W
Size: 8 bits
The operation of this register is detailed in the description for register C0DCLKDIS.
5.1.18 C1BNKARC—Channel B Bank Architecture
MMIO Range: MCHBAR
Address Offset: 18Eh
Default Value: 0000h
Access: R/W
Size: 16 bits
The operation of this register is detailed in the description for register C0BNKARC.
5.1.19 C1DRT1—Channel B DRAM Timing Register 1
MMIO Range: MCHBAR
Address Offset: 194h
Default Value: 900122h
Access: R/W
Size: 32 bits
The operation of this register is detailed in the description for register C0DRT1.
5.1.20 C1DRC0—Channel B DRAM Controller Mode 0
MMIO Range: MCHBAR
Address Offset: 1A0h
Default Value: 00000000h
Access: R/W
Size: 32 bits
The operation of this register is detailed in the description for register C0DRC0.

Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Specifications

General

Brand	Intel
Model	925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU
Category	Computer Hardware
Language	English