Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU User Manual

DMIBAR Registers—Direct Media Interface (DMI) RCRB
R
Intel
®
82925X/82925XE MCH Datasheet 101
7.1.3 DMIPVCCAP2—DMI Port VC Capability Register 2
MMIO Range: DMIBAR
Address Offset: 008h
Default Value: 00000001h
Access: RO
Size: 32 bits
This register describes the configuration of Virtual Channels associated with this port.
Bit Access &
Default
Description
31:24 RO
00h
VC Arbitration Table Offset (ATO): This field indicates that no table is present
for VC arbitration since it is fixed.
23:8 Reserved
7:0 RO
01h
VC Arbitration Capability: This field indicates that the VC arbitration is fixed in
the root complex. VC1 is highest priority and VC0 is lowest priority.
7.1.4 DMIPVCCTL—DMI Port VC Control
MMIO Range: DMIBAR
Address Offset: 00Ch
Default Value: 00000000h
Access: R/W, RO
Size: 16 bits
Bit Access &
Default
Description
15:4 Reserved
3:1 R/W
000b
VC Arbitration Select: This field indicates which VC should be programmed in
the VC arbitration table. The root complex takes no action on the setting of this
field since there is no arbitration table.
0 RO
0b
Load VC Arbitration Table (LAT): This field indicates that the table programmed
should be loaded into the VC arbitration table. This bit is defined as read/write with
always returning 0 on reads.

Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Specifications

General

Brand	Intel
Model	925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU
Category	Computer Hardware
Language	English